Priority is claimed to Japanese Patent Application Serial Number JP2002-023779, filed on Jan. 31, 2002, the disclosure of which is incorporated herein by reference in its entirety.
1. Field of the Invention
The preferred embodiments of the present invention relate to an optical semiconductor integrated circuit device that includes a photodiode and a manufacturing method for the same. In some preferred embodiments, the photodiode and a bipolar IC are integrated and the bipolar IC is formed in nondoped epitaxial layers, which can, for example, enable high-speed response of the photodiode.
2. Description of the Related Art
The following description sets forth the inventors"" knowledge of related art and problems therein and should not be construed as an admission of knowledge in the prior art. In, for example, an optical semiconductor integrated circuit device in which a photodetector and peripheral circuitry are monolithically formed, in comparison to that in which a photodetector and circuit elements are separately formed to construct a hybrid IC, a reduction in cost can be expected. On the other hand, the hybrid IC type can have an advantage in that it can be resistant against noise caused by external electromagnetic fields.
An embodiment of a conventional optical semiconductor integrated circuit device is disclosed in Japanese Unexamined Patent Publication No. H09-018050. Hereinafter, this structure will be described with reference to FIG. 11.
FIG. 11 is a sectional view of a conventional optical semiconductor integrated circuit (IC) device. More specifically, FIG. 11 is a sectional view of an IC in which a photodiode 1 and an npn transistor 2 are monolithically formed. As shown in FIG. 11, on the p type single crystal silicon semiconductor substrate 3, a first epitaxial layer 4 stacked by vapor-phase growth without doping is formed to a thickness of, for example, 15 to 20 xcexcm. Likewise, on this first epitaxial layer 4, a second epitaxial layer 5 stacked by vapor-phase growth with phosphorus doping is formed to a thickness of, for example, 4 to 6 xcexcm. The first and second epitaxial layers 4 and 5 are electrically isolated into a first island region 7 and a second island region 8 by a p+ type isolating region 6. In the first island region 7, a photodiode 1 is formed, and in the second island region 8, an npn transistor 2 is formed.
In the first island region 7, an n+ type diffusion region 9, which serves as a cathode exit, is formed on almost the entire surface of the second epitaxial layer 5. An oxide film 10 is also formed on the surface of this second epitaxial layer 5. Furthermore, a cathode electrode 11 comes into contact with the n+ type diffusion region 9 through a contact hole partially made in oxide film 10. The isolating region 6 is regarded as an anode side low resistance extracting region of the photodiode 1. An anode electrode 12 comes into contact with the surface of the isolating region 6. As a result, a photodiode 1 is constructed.
In the second island region 8, at the boundary between the first epitaxial layer 4 and the second epitaxial layer 5, there is embedded an n+ type layer 13. On the surface of the second epitaxial layer 5 above this n+ type embedded layer 13, a p type base region 14 of the npn transistor 2, an n+ type emitter region 15, and an n+ type collector region 16 are formed. An aluminum (Al) electrode 17 makes contact with the upper surfaces of the respective diffusion regions, and an Al layer extending on the oxide film 10 joins the respective elements. As a result, the npn transistor 2 is constructed. The photodiode 1 composes a light signal input part, and the npn transistor 2 composes a signal processing circuit in conjunction with other elements.
As mentioned above, in the conventional optical semiconductor integrated circuit device, the first epitaxial layer 4 is formed without doping, and the second epitaxial layer 5 is formed by doping phosphorus. Therefore, the photodiode 1 is constructed as a pin diode, and the nondoped first epitaxial layer 4 is formed as a depletion layer forming region. With this structure, the junction capacitance is suppressed, the light absorption is improved, occurrence of carriers outside the depletion layer is suppressed, and the response speed of the photodiode 1 is improved.
In order to further improve the response speed of the photodiode 1 while a depletion layer forming region in the photodiode 1 is secured, it is considered that the second epitaxial layer 5 is also formed without doping. In this case, if only the performance of the photodiode 1 is considered, satisfactory effects can be obtained. However, the npn transistor 2 side monolithically formed has the following problems. Because the second epitaxial layer 5 at the npn transistor 2 side is formed without doping, no pn junction region exists between the p type base region 14 and p+ type isolating region 6, and the structure of the second epitaxial layer also becomes a high resistance condition. Therefore, inversion and parasitic influence easily occur at the surface of the second epitaxial layer region between the base region 14 and the isolating region 6.
The preferred embodiments of the present invention have been developed in view of the above mentioned and/or other conventional problems. An optical semiconductor integrated circuit device, according to some preferred embodiments of the invention, includes a one-conduction type semiconductor substrate, a plurality of epitaxial layers which are stacked on a surface of the substrate and formed with almost no doping, a one-conduction type isolating region which penetrates the epitaxial layers and forms at least first and second island regions, a one-conduction type vertical transistor formed in the first island region, and a photodiode formed in the second island region, wherein a reverse conduction type diffusion region is formed at an inner side of the isolating region forming the first island region, and the transistor is formed in the first island region surrounded by the diffusion region.
An optical semiconductor integrated circuit device of some embodiments of the invention preferably includes that, at the boundary surface between the epitaxial layer that is uppermost among the plurality of epitaxial layers and the epitaxial layer positioned below this uppermost epitaxial layer, a reverse conduction type embedded layer is formed across the boundary surface, and the embedded layer and the diffusion region are joined with each other at ends of the embedded layer.
A method for manufacturing an optical semiconductor integrated circuit device according to some embodiments of the invention includes: preparing a one-conduction type semiconductor substrate, forming a plurality of epitaxial layers with almost no doping on the semiconductor substrate, forming a one-conduction type isolating region that penetrates the epitaxial layers and isolating the epitaxial layers into at least first and second island regions, forming a one-conduction type vertical transistor in the first island region and forming a photodiode in the second island region, wherein a reverse conduction type diffusion region is formed in the first island region from the uppermost epitaxial layer, and the transistor is formed at an inner side of this diffusion region.
According to an optical semiconductor integrated circuit device of some embodiments of the invention, nondoped multilayered epitaxial layers on a semiconductor substrate are isolated into a plurality of island regions, and in the island regions, at least a photodiode and a vertical pnp transistor are formed. The photodiode is preferably formed of nondoped epitaxial layers, so that almost the entire region of the epitaxial layer region can be used as a depletion layer forming region. This can realize a photodiode which can respond at a high speed.
Furthermore, according to an optical semiconductor integrated circuit device of some embodiments of the invention, nondoped multilayered epitaxial layers on a semiconductor substrate are isolated into a plurality of island regions, and at least a photodiode and a vertical pnp transistor are formed in the island regions. In the vertical pnp transistor, an n+ type diffusion region can be formed between a p+ type diffusion region as a collector region and a p+ type isolating region. This can realize a vertical pnp transistor with high voltage endurance within the epitaxial layers that are stacked without doping.
Furthermore, according to the optical semiconductor integrated circuit device of some embodiments of the invention, as mentioned above, a photodiode and a vertical pnp transistor which are different in performance from each other can be improved in performance and formed on one substrate.
Furthermore, according to the manufacturing method for an optical semiconductor integrated circuit device of some embodiments of the invention, multi epitaxial layers are formed without doping on a semiconductor substrate. In at least two island regions of a plurality of island regions isolated by isolating regions, a photodiode and a vertical pnp transistor are formed. In the vertical pnp transistor, an n+ type diffusion region is formed between a p+ type diffusion region as a collector region and a p+ type isolating region. This can realize a vertical pnp transistor having high voltage endurance within the epitaxial layers that are stacked without doping. As a result, a photodiode and a vertical pnp transistor which are different in performance from each other can be improved in performance and formed on one substrate.
The above and/or other aspects, features and/or advantages of various embodiments will be further appreciated in view of the following description in conjunction with the accompanying figures. Various embodiments can include and/or exclude different aspects, features and/or advantages where applicable. In addition, various embodiments can combine one or more aspect or feature of other embodiments where applicable. The descriptions of aspects, features and/or advantages of particular embodiments should not be construed as limiting other embodiments or the claims.